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SanDisk & Toshiba Flash memory advances


February 11, 2009

The 3-bit-per cell, 32nm chip.

The 3-bit-per cell, 32nm chip.

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February 12, 2009 The cooperative relationship between SanDisk and Toshiba in the development and manufacturing of advanced Flash memory is producing results with the companies announcing key technology advances at the International Solid State Circuits Conference (ISSCC) in San Francisco, California. The advances include the production of a 32-gigabit (Gb) 3-bits-per-cell (X3) memory chip that is expected to quickly enable greater capacities and reduce manufacturing costs for products ranging from memory cards to Solid State Drives (SSD). The companies also announced the fabrication of the world’s first 64Gb chip that applies 4-bit-per-cell (X4) technology without an increase in chip size, while achieving a write speed performance of 7.8MB/s.

The 32Gb X3 on 32nm technology is the smallest NAND flash memory die reported so far, able to fit into the fingernail-sized microSD memory card format that has enjoyed widespread adoption in mobile phones and other consumer electronics devices. The 32nm 32Gb X3 is the highest density microSD memory die in the world, providing twice the capacity of a microSD chip on 43nm while still maintaining a similar die area. The X3 is expected to bring advances in chip densities and cost savings to next generation devices with Yoram Cedar, executive vice president, OEM business unit and corporate engineering for SanDisk saying: “The microSD form factor has grown in popularity due to rising demand for high capacity storage on mobile phones, and X3 will enable us to bring exciting new products to this market.”

Meanwhile the application of 4-bit-per-cell technology at the 43 nm process generation by SanDisk and Toshiba has enabled the fabrication of the world’s first 64Gb chip, which realizes 64Gb without increase in chip size, while achieving a write speed performance of 7.8MB/s. The companies claim the technology maintains performance on a par with today’s multi-level cell (MLC) technology and that the X4 memory chip combines with the X4 controller chip in a multi-chip package (MCP) to provide a complete, integrated and low-cost storage solution.

Production of the 64Gb X4 based on SanDisk’s mature 43nm technology is planned for the first half of 2009, while the 3-bit-per-cell X3 32 gigabit (Gb) chip will be mass produced in the second half of 2009.

Darren Quick

About the Author
Darren Quick Darren's love of technology started in primary school with a Nintendo Game & Watch Donkey Kong (still functioning) and a Commodore VIC 20 computer (not still functioning). In high school he upgraded to a 286 PC, and he's been following Moore's law ever since. This love of technology continued through a number of university courses and crappy jobs until 2008, when his interests found a home at Gizmag.   All articles by Darren Quick
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